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III-V on Silicon Devices and Systems for Next Generation Optical Interconnects

This research project is in competition for funding with one or more projects available across the EPSRC Doctoral Training Partnership (DTP). Usually the projects which receive the best applicants will be awarded the funding. Find out more information about the DTP and how to apply.

The goal of this PhD is to invent and develop proof-of-concept quantum dot devices (modulator and/or photodetector) in order to overcome the traditional challenges of epitaxial growth of III-V over Si.


The fast maturing field of Silicon Photonics research is already being transferred to industry applications by some of the leading technological companies including Intel, IBM, Hewlett Packard and Cisco. Primary industrial use of this technology is in optical interconnects for datacom/telecom applications.

In order to develop this technology further it will be essential to integrate active devices on the silicon platform with improved manufacturability and scalability. It is anticipated that research into the direct epitaxial of III-V materials on Si will lead to essential developments and improvements in this area.

Active devices grown via epitaxy on Si normally use quantum wells, however, the crystalline defects formed during epitaxy limits performance and lifetime. Due to defect-tolerance, temperature and radiation hardness, quantum dots are the main candidate to further improve performance and lifetimes towards a better scalability and manufacturability standard.

Project aims and methods

You will work within the framework of the Future Compound Semiconductor Manufacturing Hub, which comprises 35 industrial partners and four universities, with the objective of developing compound semiconductor research from materials to systems. We have a long tradition of developing III-V quantum dot lasers over Si, from wafer growth to final characterization. The project will make use of the excellent resources and expertise available at the Institute for Compound Semiconductors (ICS).

The project will follow a flexible timeline:

  1. Literature review, laboratory orientation, initial studies (0.5 year).
  2. Simulations, developmental/preparatory experiments (0.5 year).
  3. System design/development (1 year).
  4. Fabrication (0.5 year).
  5. Device demonstration and exploitation (0.5 year).


Dr Nicolas Abadia

Condensed Matter and Photonics Group

Peter Smowton

Yr Athro Peter M Smowton

Deputy Head of School and Director of Research

+44 (0)29 2087 5997

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